Product InfoSpecification
Ordering
|  | Cycle based, 50 MHz dynamic digital subsystem with high performance timing generator |
| | High voltage pin electronics with per channel programmability |
| | Per channel parametric measurement unit (PMU) |
| | Analog bus access for each I/O channel |
| | Dual level drive / sense, and programmable load on a per channel basis |
| | Supports sngle-ended or differential channel configurations |
| | 256 timing sets with 4 phases and 4 windows |
| | 0 - 64 us phase and window programming range |
| | Supports up to 528 bi-directional I/O channels |
| | 256K of vector memory |
| | Comprehensive software tool set supports CASS legacy programs and importing of IEEE - 1445 compliant vector files |
| | 6U PXI Instrument |
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DescriptionThe GX5960 digital subsystem represents the highest level of performance available for PXI-based digital instrumentation. Based on the proven architecture of the GX5055 and the EADS T964, the GX5960 offers high performance pin electronics and a timing generator / sequencer in a compact, 6U PXI form factor. The GX5960 series consists of one GX5961 Clock generator board with 16 driver / sensor channels and the GX5964 driver / sensor board which supports 32 bi-directional I/O channels. Up to 528 digital I/O channels can be supported by the GX5960 digital subsystem. Each digital channel features a wide drive / sense voltage range of -15 V to +25V (maximum swing of 26 volts) which can be individually programmed for a drive hi, drive lo, sense hi, sense lo, and a load value (with commutation voltage level) – offering the user complete flexibility when creating test programs and fixtures for multiple UUTs. In addition, each channel offers a parametric measurement unit (PMU) for DC measurements.
FeaturesThe GX5960 offers real-time digital stimulus, record, or expect data modes on all I/O channels. Pattern memory depth is 256K words. Each channel can be configured as an input or output on a per cycle basis. Six drive data formats are supported: NR, R1, R0, RZ, RC, and Complement Surround – providing flexibility to create a variety of bus cycles and waveforms to test board and box level products.
The GX5961 provides timing, input / output synchronization signals, and sequencing as well as 16 I/O channels. Additional channels can be added to the system by installing one or more, GX5964 boards which are interconnected via the PXI local and trigger busses. The GX5961 offers a flexible clock system which allows the module to operate as a timing master to the UUT or be slaved to the UUT’s time base or some other external clock.
All pin electronic resources are independent on a per channel basis – offering the user complete flexibility when programming drive / sense levels, source / sink currents, slew rate, skew, or PMU functions. The PMU can operate in the force voltage / measure current or force current / measure voltage mode and is useful for measuring a UUT’s DC characteristics. In addition, each I/O channel includes an analog bus relay, which allows each channel to support hybrid channel (digital or analog) measurement capabilities. For analog stimulus / response measurements, the analog bus can be connected to external resources via a dedicated analog bus connector located on the front panel of the module.
Data SequencerThe GX5961’s sequencer supports sequences up to 4096 steps and has 16 loop counters that may be nested. The sequencer supports a variety of sequencing functions including jumps, subroutines, looping, and test inputs. All of the sequencer commands may be programmed using a Graphical Vector Editor, Windows® API commands, or via a script language. The sequencer allows the user to generate test vectors indefinitely at maximum test rates. Internal and external trigger and pause commands are available in several modes.
Timing GeneratorThe GX5961’s timing generator supports 256 timing sets which can consist of up to 4 drive phases and 4 sense windows for 4K of sequence steps. Alternative timing set configurations include 1K of timing sets with 4 phases and 4 sense windows or 4K of timing sets with 1 phase and 1 window. The T0 cycle or sequencer period range is programmable from 20 ns to 64 us with the phase and window values programmable from 0 ns to 64 us. This flexibility offers the user the ability to address a wide range of applications including the emulation of complex bus cycles and proprietary digital interfaces.
CompatibilityThe GX5960 subsystem can operate in any 6U PXI chassis that supports an air flow rate of 20 cfm/slot. Power for the pin electronics requires the use of external power supplies or the GX5960 can be used with a Geotest GX7005A / GX7015A PXI chassis which is designed specifically for high performance / high power digital applications and includes the necessary pin electronics power supplies.
SoftwareThe board is supplied with GtDio6x, a software package that includes vector editing, a virtual instrument panel, and 32/64-bit DLL driver libraries and documentation. The virtual panel can be used to interactively program and control the instrument from a window that displays the instrument’s current settings and status. In addition, interface files are provided to support access to programming tools and languages such as ATEasy, LabView, C/C++, Microsoft Visual Basic®, Delphi, and Pascal. On-Line help file and PDF User's Guide provides documentation that includes instructions for installing, using and programming the board.
Other optional software packages are available to support the importing of CASS digital TPS’ or IEEE-1445 .tap files.
Applications | | Automatic Test Equipment (ATE) |
| | High-speed functional digital test |
| | Vector capture |
| | Hybrid and digital device test |
| | Memory testing |
| | LRU and SRU test |
See Also
|  | DtifEasy Series - LASAR Post Processor, Run Time and Diagnostic Test Solution | | | GX5055 - Dynamically Controlled, High Voltage Digital I/O PXI Card with Pin Electronics | | | GX5295 - Dynamic Digital I/O with Per Channel Programmable Logic Levels and PMU PXI Card |
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| Timing | | Internal Test Clock or System Clock (T0_Clk) | 15.625 KHz to 50 MHz (using the 500 MHz master clock) | | Test Clock Timebase | Ext Reference Clock: 1 MHz to 80 MHz
Internal reference clock: 20 MHz | | TO_CLK Timing Resolution | 2 ns (using the 500 MHz master clock) | | Master Clock (Phase and Window Timing Source) | 500 MHz(internal oscillator), +/- 50 ppm
40 KHz to 500 MHz (PLL), +/- 50 ppm | | Master Clock Reference | Internal: 20 MHz
PXI CLCK10
Front panel: 5 MHz to 80 MHz | | Timing Set Options | •256 Timing Sets with 4 Phases, 4 Windows, and 4K sequence steps
•1 K Timing Sets with 4 Phases, 4 Windows, and 1 K sequence steps (one timing set for each sequence step)
•4K Timing Sets with 1 Phase, 1 Window, and 4K sequence steps (one timing set for each sequence step) | | Phase Programming Range (Assert / Return) | 0 ns to 64 us (using the 500 MHz master clock) | | Window Programming Range (Open / Close) | 0 ns to 64 us (using the 500 MHz master clock) | | Phase and Window Timing Resolution | 1 ns, using the 500 MHz master clock | Drive / Sense Modes & Channel I/O Specifications
(All specifications based on pin electronic voltage rails (Vcc & Vee) of +18 volts and -14 volts) | | Number of I/O Channels (single-ended) | 16 per card (GX5961)
32 per card (GX5964) | | Channel Configuration | Single-ended or differential, programmable per channel | | Test Modes | Dynamic or Static | | Data Output Formats (per channel) | Drive Hi, Drive Lo, Hi-Z
Formatted Data: No return, Return to 1, Return to 0, Return to Hi-Z, Return to complement, Surround by complement; selectable on a per channel basis | | Drive Data Timing (per channel) | Data assert / de-assert based on Phases 1-4 | | Capture Modes (per channel) | Mask
Opening edge of Window
Closing edge of Window
Window - data is valid for entire window duration | | Drive / Expect Mode | Output: Drive Hi, Drive Lo, Hi-Z
Expect: 1, 0, OK, between states, or mask
Keep last
Toggle last
Accumulate CRC-16 | | Number of Drive and Sense Voltage References | GX5961:
•16 Drive Hi / Drive Lo
•16 Sense Hi / Sense Lo
GX5964:
•32 Drive Hi / Drive Lo
•32 Sense Hi / Sense Lo | | Drive Voltage Level | Drive Hi: -9 to + 15V
Drive Lo: -10 to + 11V | | Drive Voltage Level Range | 0.5 Vp-p, min.
25 Vp-p, max. | | Drive Voltage Accuracy | +/- 25 mV, < 26 Vp-p driver voltage | | Drive Voltage Resolution | 16 bits | | Output Impedance | 50 ohms, typical | | Drive Current | 200 mA per channel
1.6 A per board, max (GX5964)
0.8 A per board, max (GX5961) | | Short Circuit Protection | Programmable current level with automatic disable , per channel basis | | Slew Rate | .1 to 1 V/nS, adjustable | | Channel Skew | 160 ps, typical
320 ps max., after calibration for all channels (single board)
(Drive and Sense) | | Channel De-Skew | Range: +/- 5 ns
- Resolution: 312.5 ps
- Programmable on a per channel basis
- Separate deskew control for drive and sense | | Sense Voltage Range | Sense Hi: -10 to + 11V
Sense Lo: -10 to + 11V | | Sense Voltage Threshold Accuracy | +/- 25 mV, < 25 Vp-p sense voltage | | Sense Voltage Resolution | 16 bits | | Input Leakage Current | 50 nA, max | | Pull-up, Pull-down Current Source / Sink | +/- 24 ma, programmable on a per channel basis
V commutate: -10 to +11 V, programmable on a per channel basis | Pull-up / Pull-down Current Source
Source / Sink Accuacy | +/- 250 uA | Pull-up / Pull-down Current Source
Source / Sink Resolution | 16 bits | | Voltage Commutation Accuracy | +/- 25 mV, < 25 V range | | Voltage Commutation Resolution | 16 bits |
| Resistive Load | Range: Hi-Z, 250 ohm, 1 Kohm, programmable on a per channel basis | | Memory | 256K bit per channel | | Sequencer | | Commands | Jump, Conditional Jump, Loop, Call Subroutine, Return, Pause, Halt | | Loop Counters | 16, can be nested. Only one can end on a sequence step
Loop count range: 1 –64K or continuous | | Test Inputs | External: PXI triggers, Aux I/O
Internal: Data sense, Edge or level | | Sequencer Memory | 1024 or 4096 Steps | GX5961 Timing Generator Board
External Timing, Control and Status Signals | | Sync Outputs | 2, Start of Sequence; Start of Sequence Step | | General Purpose Aux I/O | 12
64 output selections
7 input selections | | Input Aux I/O Selections | Synthesizer reference clock, System clock,
Break (System Clutch), Halt (Pattern Clutch),
Sequence Jump signals | | Output Aux I/O Selections | Phase, Window, Waveform, Syncs, Seqflag,
Seq Active, Seq Idle, T0_Clk , Pat_Clk, misc test signals | | Probe | Ground, Probe Button, Probe LED, Monitor | | Parametric Measurement Unit (PMU) | | Number of PMUs | 32, one per channel (GX5964)
16, one per channel (GX5961) | | Modes | Force voltage, measure current
Forcecurrent, measure voltage | | Force Voltage Range | -10 volts to +15 volts | | Force Current Range | +/- 30 mA FS
+/- 200 mA FS | | Measure Voltage Range | -10 volts to +15 volts | | Measure Current Range | +/- 30 mA FS
+/- 200 mA FS | | Analog Measurement Bus | | Number of Analog I/O Channels | 16 per card (GX5961)
32 per card (GX5964) | | Control | Independent connect / disconnect to each I/O channel | | Environmental | | Operating Temperature | 0 to 50° C | | Storage Temperature | -20° C to +70° C | | Vibration | 5 g at 500 Hz | | Shock | 10 g for 6 ms ½ sine | | Physical Dimensions | | Size | 6U PXI, single slot | | Weight | 1.2 lbs (520 g) | | Connections (GX5961 & GX5964) | | I/O, External Control, Timing | 68 position SCSI III Type | | Analog Bus (for connections to analog instrumentation) | 68 position SCSI III Type | | External VCC / VEE | 15 position sub-D, male
+18 volts @ 6 A (GX5964)
+18 volts @ 3 A (GX5961)
-14 volts @ 6 A (GX5964)
-14 volts @ 3 A (GX5961)
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Note: Specifications are subject to change without notice.
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