Product InfoSpecification
Ordering
|  | 32 input / output channels, dynamically configurable on a per channel basis |
| | 256 MB of on-board vector memory |
| | Supports 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V TTL/LVTTL interfaces |
| | Supports LVDS, M-LVDS, LVDM interfaces |
| | 100 MHz vector rate |
| | Stimulus / Response & Real Time Compare modes |
| | Operates as a stand-alone card or with up to seven additional synchronous slave boards |
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DescriptionThe GX5292e is a high performance, cost-effective 3U PXI Express dynamic digital I/O boards offering 32 TTL or LVDS input or output channels with dynamic direction control. The GX5292e also supports deep pattern memory by offering 256 MB of on-board vector memory with dynamic per pin direction control and with test rates up to 100 MHz. The single board design supports both master and slave functionality without the use of add-on modules.
FeaturesThe GX5292e supports selectable I/O levels of 1.5 V, 1.8 V, 2.5 V, or 3.3 V (TTL, LVTTL, CMOS, LVCMOS). In addition, the GX5292e supports 32 differential channels for LVDS, M-LVDS, or LVDM logic families. The TTL/LVTTL interface utilizes a programmable voltage source, which sets the output logic levels from 1.4 V to 3.6 V. Programmable thresholds of 1.5V, 1.8V, 2.5V or 3.3V (5V compatible) are supported for input signals. Recommended operating input voltage range is from 0 V to 5.5 V.
A windowing method is utilized for PCI memory accesses, which limits the required PCI memory space for each board to only 16MB, thus preserving test system resources. A direct mode, for continuous data transfer between the test system controller and the I/O pins of the GX5292e is also supported.
The GX5292e offers 256 MB of vector memory, with 64 Mb per channel. Programmable I/O width allows trading vector width for vector depth. Under software control, the GX5292e’s vector memory can be configured to support channel widths of 32, 16, 8, 4, 2 and 1 with corresponding vector depths of 64 Mb, 128 Mb, 256 Mb, 512 Mb, 1024 Mb, and 2048 Mb per channel.
The GX5292e provides programmable TTL/LVTTL output clocks and strobes, and supports external clock and strobe. A programmable PLL (phase locked loop) provides configurable clock frequencies and delays. An LVDS input and output clock is also provided.
The GX5292e’s sequencer can halt or pause on a defined address or loop through the entire memory as well as loop on a defined address range or through a defined block of memory.address range or through a defined block of memory. Two modes digital test are also supported –a Stimulus / Response and a RealTime Compare mode. The Stimulus / Response mode is used for driving and capturing data. Alternatively, for digital tests requiring long test vectors, the Real-Time Compare mode can be used to significantly shorten overall test times by comparing in real-time, expected test results and logging only failed vectors and resultant test results (pass or fail).
Programming and SoftwareThe GX5292e is supplied with DIOEasy, which provides powerful graphical vector development / waveform display tools as well as a virtual instrument panel, 32-bit DLL driver libraries, and documentation. The virtual panel can be used to interactively adjust and control the instrument from a window that displays the instrument’s current settings and status. In addition, various interface files provide access to the library for programming tools and languages such as ATEasy, Microsoft® and Borland® C/C++, Microsoft Visual Basic®, Borland Delphi, and LabVIEW.
Optionally, DtifEasy is available for use with the GX5292e. DtifEasy offers a complete LASAR post-processor and test execution environment for post-processing and executing of LASAR generated .tap files.
Applications | | Semiconductor test |
| | Displays, printers, and disk drive testing |
| | ASIC testing |
| | A/D and D/A testing |
| | Video acquisition / playback applications |
| | High speed, bi-directional bus testing / emulation |
See Also
 | DIOEASY - Digital I/O Vector Development Software | | DIOEasy Training - DIOEasy Training (Customer or Geotest Site) | | DIOEASY-FIT - File import tool for importing and converting WGL vectors for Geotest Digital IO instruments | | GX5050 - Dynamically Controlled High Speed Digital I/O PXI Card | | GX5055 - Dynamically Controlled, High Voltage Digital I/O PXI Card with Pin Electronics | | GX5150 Series - Dynamically Controlled High Speed Digital I/O PXI Card | | GX5152 Series - Digital Stimulus Response PXI Card | | GX5280 Series - Dynamically Controlled High Speed Digital I/O PXI Card | | GX5290 Series - Dynamically Controlled High Speed Digital I/O PXI Card | | GX5295 - Dynamic Digital I/O with Per Channel Programmable Logic Levels and PMU PXI Card | | GX5960 Series - High Performance Dynamic Digital I/O PXI Subsystem |
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Input / Output Channel Features | | Logic families | TTL/LVTTL/CMOS/LVCMOS (1.5 V, 1.8 V, 2.5
V, 3.3 V, or 5 V) , LVDS/LVDM/M-LVDS | | I/O Levels | TTL/LVTTL/CMOS/LVCMOS:
Programmable Output Voltage Level
1.4 V (Min); 3.6 V (Max)
Input Threshold
1.5 V, 1.8V, 2.5V, or 3.3 V (5V tolerant)
Recommended Operating Conditions
0V (Min); 5.5V (Max)
LVDS/LVDM/M-LVDS:
Recommended Operating Conditions
Voltage Output:
-1.4V (Min.); 3.8 V (Max.)
Voltage Input:
.05V (Min.); 3.3V (Max.) | | Channel Timing Skew | 1 ns same card, 1 ns between cards | | Number of Channels | 32 I/O, direction and configuration is dynamically
configurable on a per vector and per channel basis | | Memory Depth Per Channel: | 64Mb - 2Gb | | Test Modes | | Stimulus / Response | Drive / Capture daa , up to 64 Mb per channel | | Real-Time Compare | Drive / Compare data against expected data pattern.
Expect & mask data on a per cycle basis | | Real Time Compare Record Memory | 1024 x 64 bits of record memory
Records compared data and address | | Real Time Compare Stop Modes | Stop on defined count errors (max is 1024)
Stop when detected failures equal defined number of failures
Stop on defined comparison data value
Storp on defined program counter value | | Timing | | Internal Test Clock | | Frequency Range | 5 Hz (Min.); 100 MHz (Max.) | | Accuracy | Greater of (+/- 1 Hz or +/- 0.02% of programmed value)
+ accuracy of reference clock (PXI 10 MHz or external reference clock) | | Jitter | +/- 20 mUI of internal clock frequency, max | | Reference | PXI 10 MHz or XClk (external clock) input | | Internal B clock output (TTL/LVTTL ) | | Frequency Range | 300 KHz (Min.); 100 MHz (Max.) | | Accuracy | Greater of (+/- 1 Hz or +/- 0.5% of programmed value)
+ accuracy of reference clock | | Internal C Clock Output (LVDS/LVDM/M-LVDS) | | Frequency Range | 3000KHz (Min.); 100 MHz (Max.) | | Accuracy | Greater of (+/- 1 Hz or +/- 0.5% of programmed value)
+ accuracy of reference clock | | External Test Clock Input | Frequency Range
(Configured as Sample Clock) | 0 Hz (Min.); 100 MHz (Max.) | Frequency Range
(Configured as Input to PLL) | 8 MHz (Min.); 10.5 MHz (Max.) | | Pulse Width | 40% Min, 60% Max | | Input Level | User selectable I/O level: 1.5 V, 1.8 V, 2.5 V,
or 3.3 V (5 V tolerant) | | External Strobe Clock Input | | Frequency Range | 0 Hz (Min.); 100 MHz (Max.) | | Logic Levels | TTL / LVTTL / CMOS / LVCMOS
Input threshold: 1.5 V, 1.8 V, 2.5 V, or 3.3 V (5V tolerant) | | Power | | 3.3 VDC | 200 mA (Min.); 4 A (Max.) | | 12 VDC | .03mA (Min.); .1mA (Max.) | | Environmental | | Operating Temperature | 0 to 50° C | | Storage Temperature | -20° C to 70° C | | Size | 3U PXI | | Weight | 200 g | |
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Note: Specifications are subject to change without notice.
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